Programme

Mar
15
Tue
2016
Session 5: Affine Programs (Louis-Noël Pouchet)
Mar 15 @ 10:00 am – 11:15 am

Chair: Louis-Noël Pouchet (Ohio State University)

#91: Daniele G. Spampinato and Markus Püschel. A Basic Linear Algebra Compiler for Structured Matrices

#38: Lénaïc Bagnères, Oleksandr Zinenko, Stéphane Huot and Cédric Bastoul. Opening Polyhedral Compiler’s Black Box

#64: Gabriel Rodríguez, José M. Andión, Mahmut Kandemir and Juan Tourino. Trace-based Affine Reconstruction of Codes

Session 6: Static Analysis (Michael O’Boyle)
Mar 15 @ 11:35 am – 12:50 pm

Chair: Michael O’Boyle (University of Edinburgh)

#42: Mateus Tymburiba, Rubens Emílio and Fernando Pereira. Inference of Peak Density of Indirect Branches to Detect ROP Attacks

#25: Yulei Sui, Peng Di and Jingling Xue. Sparse Flow-Sensitive Pointer Analysis for Multithreaded C Programs

#43: Vitor Paisante, Maroua Maalej, Leonardo Barbosa, Laure Gonnord and Fernando Pereira. Symbolic Range Analysis of Pointers

Session 7: Programming Models (Mauricio Breternitz)
Mar 15 @ 2:20 pm – 3:35 pm

Chair: Mauricio Breternitz (AMD)

#74: Vassilis Vassiliadis, Jan Riehme, Jens Deussen, Konstantinos Parasyris, Christos D. Antonopoulos, Nikolaos Bellas, Spyros Lalis and Uwe Naumann. Towards Automatic Significance Analysis for Approximate Computing

#17: Kevin Brown, Hyoukjoong Lee, Tiark Rompf, Arvind Sujeeth, Christopher De Sa, Christopher Aberger and Kunle Olukotun. Have Abstraction and Eat Performance Too: Optimized Heterogeneous Computing with Parallel Patterns

#28: Melanie Kambadur and Martha Kim. NRG-Loops: Adjusting Power from Within Applications

Mar
16
Wed
2016
CGO Best Paper Award and Keynote – Avinash Sodani
Mar 16 @ 8:30 am – 9:30 am

Knights Landing Intel Xeon Phi CPU: Path to Parallelism with General Purpose Programming

The demand for high performance will continue to skyrocket in the future, fueled by the drive to solve the challenging problems in scientific world and to provide the horsepower needed to support the compute-hungry use cases that continue to emerge in commercial and consumer space, such as machine learning and deep data analytics. Exploiting parallelism will be crucial in achieving the huge performance gain required to solve these problems. This talk will present the new Xeon Phi Processor, called Knights Landing, which is architected to provide massive amounts of parallelism in a manner that is accessible with general purpose programming. The talk will provide insights into 1) the important architecture features of the processor and 2) the software technology to explore them. It will provide the inside story on the various architecture decisions made on Knights Landing – why we architected the processor the way we did, and on a few programming experience – how the general purpose programming model makes it easy to exploit parallelism on Xeon Phi. It will show measured performance numbers from the Knights Landing silicon on a range of workloads. The talk will conclude with showing the historical trends in architecture and what they mean for software as we extend the trends into the future.

Biography

sodaniAvinash Sodani is a Senior Principal Engineer at Intel Corporation and the chief architect of the Xeon-Phi Processor called Knights Landing. He specializes in the field of High Performance Computing (HPC). Previously, he was one of the architects of the 1st generation Core processor, called Nehalem, which has served as a foundation for today’s line of Intel Core processors. Avinash is a recognized expert in computer architecture and has been invited to deliver several keynotes and public talks on topics related to HPC and future of computing. Avinash holds over 20 US Patents and is known for seminal work on the concept of “Dynamic Instruction Reuse”.  He has a PhD and MS in Computer Science from University of Wisconsin-Madison and a B.Tech (Hon’s) in Computer Science from Indian Institute of Technology, Kharagpur in India.

Break
Mar 16 @ 9:30 am – 10:00 am
Session 8: Correctness (Aaron Smith)
Mar 16 @ 10:00 am – 11:15 am

Chair: Aaron Smith (Microsoft)

#45: Soham Chakraborty and Viktor Vafeiadis. Validating Optimizations of Concurrent C/C++ Programs

#85: Ignacio Laguna, Martin Schulz, David F. Richards, Jon Calhoun and Luke Olson. IPAS: Intelligent Protection Against Silent Output Corruption in Scientific Applications

#99: Adarsh Yoga and Santosh Nagarakatte. Atomicity Violation Checker for Task Parallel Programs

Break
Mar 16 @ 11:15 am – 11:35 am
Session 9: Binary/Virtualization (Soo-mook Moon)
Mar 16 @ 11:35 am – 12:50 pm

Chair: Soo-mook Moon (Seoul National University)

#95: Daniele Cono D’Elia and Camil Demetrescu. Flexible On-Stack Replacement in LLVM

#96: Byron Hawkins, Brian Demsky and Michael Taylor. BlackBox: Lightweight Security Monitoring for COTS Binaries

#69: Toshihiko Koju, Reid Copeland, Motohiro Kawahito and Moriyoshi Ohara. Re-constructing High-Level Information for Language-Specific Binary Re-optimization

Closing
Mar 16 @ 12:50 pm – 1:00 pm