When:
13th March 2016 @ 2:00 pm – 5:30 pm
2016-03-13T14:00:00+01:00
2016-03-13T17:30:00+01:00
Where:
BNC B
Contact:
Mauricio Breternitz (AMD Research), Youfeng Wu (Intel), Vijay Janapa Reddi (University of Texas, Austin)
Long employed by industry, large scale use of binary translation and on-the-fly code generation and optimization is becoming pervasive both as an enabler for virtualization, processor migration and also as processor implementation technology. The emergence and expected growth of just-in-time compilation, virtualization and Web 2.0 scripting languages brings to the forefront a need for efficient execution of this class of applications. The availability of multiple execution threads brings new challenges and opportunities, as existing binaries need to be transformed to benefit from multiple processors, and extra processing resources enable continuous optimizations and translation.
The main goal of this half-day workshop is to bring together researchers and practitioners with the aim of stimulating the exchange of ideas and experiences on the potential and limits of Architectural and MicroArchitectural Support for Binary Translation and Dynamic Optimization (hence the acronym AMAS- DO, reflecting an a change fromprevious editions). The key focus is on challenges and opportunities for such assistance and opening new avenues of research. A secondary goal is to enable dissemination of hitherto unpublished techniques from commercial projects.