CGO – 2005 Advance Program

 

 

Sunday, March 20, 2005

 

Workshop on Optimizations for DSP and Embedded Systems (ODES)
       Deepu Talla, Texas Instruments; Lizy John, University of Texas at Austin
       Full Day (8:00am -- 5:00pm)
Workshop on Managed Runtime Environments(MRE05)
       David Grove, IBM; Michael Hind, IBM
       Half:Day: Afternoon (1:00pm -- 5:30pm)
Workshop on Explicitly Parallel Instruction Computing Techniques (EPIC)
       Gerolf Hoflehner, Intel; Carole Dulong, Intel
       Half-Day: Afternoon (1:00pm -- 5:30pm)
Tutorial: Software dynamic translation: Challenges, approaches and applications
       Bruce Childers, University of Pittsburgh; Jack Davidson, University of Virginia
       Half-Day: Morning (8:00am -- 12:00N)

 

Monday, March 21, 2005

 

8:45 – 9:00

Welcome

9:00 – 10:00

Keynote Speaker 1

10:00 – 10:30

Break

10:30 – 12:00

Session 1: Virtual Machine Techniques

12:00 – 1:30

Lunch (provided)

1:30 – 3:30

Session 2: Dynamic Optimization

3:30 – 4:00

Break

4:00 – 5:30

Session 3: Searching the Optimization Space

6:00 – 7:00

NVIDIA (Technical Talk and Refreshments. Details to follow)

7:00 – 8:00

Microsoft Phoenix Compiler Optimization Framework (Discussion and Refreshments. Details to follow)

Dinner (on your own)

 

Tuesday, March 22, 2005

 

9:00 – 10:00

Keynote Speaker 2

10:00 – 10:30

Break

10:30 – 12:00

Session 4: Optimizing Embedded Systems

12:00 – 1:30

Lunch (on your own)

1:30 – 2:30

Session 5: Code Profiling and Optimization for Embedded Systems

2:30 – 3:00

Break

3:00 – 4:30

Session 6: Profiling and Trace Compression

4:30 – 5:00

Break

5:00 – 6:00

Session 7: Security and Reliability

6:30 – 8:30

Conference Dinner

9:00 – 10:00

CGO Business Meeting

 

Wednesday, March 23, 2005

 

9:00 – 10:30

Session 8: Pointer Analysis and Register Allocation

10:30 – 11:00

Break

11:00 – 12:30

Session 9: Software Speculation

 

 

Keynote Speaker 1

 

Chair: Evelyn Duesterwald, IBM T. J. Watson Research Center

 

Virtual Machine Learning: Thinking like a Computer Architect

Michael Hind, IBM T. J. Watson Research Center

 

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Session 1: Virtual Machine Techniques

 

Chair: Vikram Adve, University of Illinois, Urbana-Champaign

 

Context Threading: A Flexible and Efficient Dispatch Technique for Virtual Machine Interpreters    

M. Berndl, B. Vitale, M. Zaleski, and A. Demke-Brown (University of Toronto)

 

Automatically Reducing Repetitive Synchronization with a Just-In-Time Compiler for Java

M. Stoodley and V. Sundaresan (IBM)

 

Compile-Time Concurrent Marking Write Barrier Removal

D. Detlefs (Sun Microsystems) and V. K. Nandivada (University of California, Los Angeles)

 

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Session 2: Dynamic Optimization

 

Chair: Chandra Krintz, University of California, Santa Barbara

 

Collecting and Exploiting High-Accuracy Call Graph Profiles in Virtual Machines

M. Arnold and D. Grove (IBM T. J. Watson Research Center)

 

Effective Adaptive Computing Environment Management via Dynamic Optimization

S. Hu, and M. Valluri, and L. John (University of Texas, Austin)

 

Maintaining Consistency and Bounding Capacity of Software Code Caches

D. Bruening and S. Amarasinghe (Massachusetts Institute of Technology and Determina Corporation)

 

Performance of Runtime Optimization on BLAST

A. Das, J. Lu, H. Chen, J. Kim, P. Yew, W. Hsu (University of Minnesota) and D. Chen (Intel Corporation)
 

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Session 3: Searching the Optimization Space

 

Chair: Jack Davidson, University of Virginia

 

Optimizing Sorting with Genetic Algorithms

X. Li, M. Garzaran, and D. Padua (University of Illinois, Urbana-Champaign)

 

Combining Models and Guided Empirical Search to Optimize for Multiple Levels of the Memory Hierarchy

C. Chen, J. Chame, and M. Hall (University of Southern California / Information Sciences Institute)

 

Predicting Unroll Factors Using Supervised Classification

M. Stephenson (Massachusetts Institute of Technology) and S. Amarasinghe (Massachusetts Institute of Technology and Determina Corporation)

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Keynote Speaker 2

 

Chair: Mike Smith, Harvard University

 

Multicores from the Compiler's Perspective: a Blessing or a Curse?

Saman Amarasinghe, Massachusetts Institute of Technology and Determina Corporation

 

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Session 4: Optimizing Embedded Systems

 

Chair: Martin Burtscher, Cornell University

 

Optimizing Address Code Generation for Array-Intensive DSP Applications

G. Chen and M. Kandemir (Pennsylvania State University)

 

Efficient SIMD Code Generation for Runtime Alignment and Length Conversion

P. Wu, A. Eichenberger (IBM T. J. Watson Research Center) and A. Wang  (IBM Toronto)

 

Superword-Level Parallelism in the Presence of Control Flow

J. Shin, M. Hall, and J. Chame (University of Southern California / Information Sciences Institute)

 

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Session 5: Code Profiling and Optimization for Embedded Systems

 

Chair: Donald Yeung, University of Maryland

 

Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache

R. Ravindran, P. Nagarkar, G. Dasika, R. Senger, E. Marsman, S. Mahlke, and R. Brown (University of Michigan)

 

Phase-Aware Remote Profiling

P. Nagpurkar, C. Krintz, and T. Sherwood (University of California, Santa Barbara)

 

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Session 6: Profiling and Trace Compression

 

Chair: Craig Zilles, University of Illinois, Urbana-Champaign

 

Practical Path Profiling for Dynamic Optimizers

M. Bond and K. McKinley (University of Texas, Austin)

 

A Programmable Hardware Path Profiler

K. Vaswani, M.  Thazuthaveetil, Y. Srikant (Indian Institute of Science)

 

Automatic Generation of High-Performance Trace Compressors

M. Burtscher and N. Sam (Cornell University)

 

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Session 7: Security and Reliability

 

Chair: Chris J. Newburn, Intel Corporation

 

SWIFT: Software Implemented Fault Tolerance

G. Reis, J. Chang, N. Vachharajani, R. Rangan, D. August (Princeton University)

 

Building Intrusion-tolerant Secure Software

T. Zhang, X. Zhuang, S. Pande (Georgia Institute of Technology)

 

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Session 8:  Pointer Analysis and Register Allocation

 

Chair: Scott Mahlke, University of Michigan

 

A Progressive Register Allocator for Irregular Architectures

D. Koes and S. Goldstein (Carnegie Mellon University)

 

A General Compiler Framework for Speculative Optimizations Using Data Speculative Code Motion

X. Dai, W. Hsu, A. Zhai, and P. Yew (University of Minnesota)

 

Practical and Accurate Low-Level Pointer Analysis

B. Guo, M. Bridges, E. Raman, S. Triantafyllis, and D. August (Princeton University)

 

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Session 9: Software Speculation

 

Chair: Roy Ju, Intel Corporation

 

Reactive Techniques for Controlling Software Speculation

C. Zilles and N. Neelakantam (University of Illinois, Urbana-Champaign)

 

A Model-based Framework: an Approach for Profit-driven Optimization

M. Zhao, B. Childers (University of Pittsburgh) and M. L. Soffa (University of Virginia)

 

Sentinel PRE: Hoisting beyond Exception Dependency with Dynamic Deoptimization

R. Odaira and K. Hiraki (University of Tokyo)

 

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